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Thread: Read and set INVALID BIT

  1. #1
    Join Date
    10.02.2015
    Posts
    47

    Default Read and set INVALID BIT

    Hi, I have problem in zenon logic to read and write INVALID BIT of a variable.

    In particular my project is a gateway:
    - it reads varaibles using an IEC850 client driver and forwards these to MASTER 870-101

    Problem appears when a RTU (IEC850 server) is offline.

    If IEC850 variable is read from server and directly redirected toward MASTER 101: invalid bit is correcly setted and sent to the master 101.

    If IEC850 variable is read from server and copied in internal variable and this internal variable redirected to MASTER: invalid bit is not transmitted.

    So I used the zenon instruction as follow:
    bBit := vsiGetBit ( GB_QAT_GBIN_GGIO10_SP6_stVal_ST , 18)
    where bBit is a bool variable, GB_QAT_GBIN_GGIO10_SP6_stVal_ST is 850 variable reads from server and 18 is ID of a status bit ( I have also used _VSB_I_BIT instead 18).
    This instruction returns ever FALSE, also for variables not read from the server (cause RTU is offline).

    I already checked in Project properties under compiler settings:
    Allocate status flags for variables with embedded properties
    Steven Costantini

  2. #2
    Join Date
    01.07.2008
    Location
    Salzburg, AT
    Posts
    1,023

    Default Re: Read and set INVALID BIT

    The vsiSetBit function in Logic is changing bits only if in the same cycle also value of variable changes and only if the fieldbus driver of this logic variable supports it. I'm not 100% sure, but 'Logic to SCADA connection' driver supports read (vsiGet) but probably not write (vsiSet).

    In zenon, depending on version, the transfer of INVALID to an internal variable may be not possible. Internal driver was not supporting INVALID bit (variables in memory are always available) and Allocations were not transferring status bits nor time stamp. This changed lately, but i do not remember when exactly. Shall be mentioned in revision texts and/or Knowledge Database.

    Alternatively to version update, you may copy the iec850 variables - not to internal driver variables, but to variables of some process driver (iec850, iec870, etc.) set to mode 'simulation static'.

  3. #3
    Join Date
    10.02.2015
    Posts
    47

    Default Re: Read and set INVALID BIT

    Maybe there was a misunderstanding on what i asked.

    I understood that not all drivers support vsiGetBit and vsiSetBit.
    I tried to extract invalid bit from 850 variable using bBit := vsiGetBit (GB_QAT_GBIN_GGIO10_SP6_stVal_ST , 18)
    Why does return ever FALSE this instruction? (I used vsiGetBit, not vsiSetBit. Driver support this instruction?).
    Is it correct to use *stVal_ST or I have to use quality variable?

    Regarding transferring INVALID to internal variable, maybe I used wrong words.
    The pictures in attachment explain what i want to tell you (1.png is a piece of ladder program and 2.png is variable definition associated to IEC870 profile).
    I need to satisfy follow request: if one of input variables in 1.png picture is INVALID, GAL_GB variable has to turn into INVALID status.
    In this chain, I used iec850 variable and variable on 870 profile (GAL_GB) and I think all these drivers support vsiGetBit and vsiSetBit.
    I have a doubt: is GAL_GB an internal or 870 driver variable?

    Reading documentation, I found this:

    IEC 60870-5 Slave
    The IEC 60870-5-101 and IEC 60870-5-104 slave protocols send the _VSB_I_BIT, _VSB_OV_BIT, _VSB_BL_BIT, _VSB_SP_BIT and _VSB_NT_BIT in the protocol telegrams for points and measures. Update of date/time stamp included.

    IEC 61850 Server
    Variable status bits are not supported by the IEC 61850 Server.

    IEC 61850 Client
    The IEC 61850 Client can read the _VSB_I_BIT from the IEC 61850 Server. Update of date/time stamp included.

    zenon RT to straton connection
    The zenon RT to straton connection can read all 64 status bits. Update of date/time stamp included.
    Attached Thumbnails Attached Thumbnails 1.png   2.png  
    Steven Costantini

  4. #4
    Join Date
    01.07.2008
    Location
    Salzburg, AT
    Posts
    1,023

    Default Re: Read and set INVALID BIT

    now i can follow (i hope):

    >Why does return ever FALSE this instruction? (I used vsiGetBit, not vsiSetBit. Driver support this instruction?).

    It should react. After you activated the compiler option - have you restarted the Logic RT? This setting cannot be updated by project online update + cold restart.

    >I have a doubt: is GAL_GB an internal or 870 driver variable?
    Variables with profile (and variables linked to IOs in a fieldbus driver tree) are not internal.
    While i was writing "internal" - i was thinking you are using 'externally visible' zenon (not Logic) variables - from zenon Internal driver

    Status transfer by connection loss will only work if also value of GAL_GB changes. The IEC60870 Slave in Logic takes into account the updates of status and time stamps only together with value changes (only zenon Process Gateway IEC870 Slave reacts on any event).

  5. #5
    Join Date
    10.02.2015
    Posts
    47

    Default Re: Read and set INVALID BIT

    Hi,
    I solved my problem after your suggestions.

    For each signal that I have to manage INVALID status, I used following code. Maybe it's not optimized but works correctly..



    TON300(IN := (AL_ConnectionState <> 65538), PT := t#5s);

    AL_AUX_APP :=
    VSIGETBIT( AL_QAT_ALIN_GGIO15_SP1_stVal_ST, 18) OR
    VSIGETBIT( AL_QAT_ALIN_GGIO15_SP2_stVal_ST, 18) OR
    VSIGETBIT( AL_QAT_ALIN_GGIO15_SP3_stVal_ST, 18) OR
    TON300.Q ;

    IF AL_AUX_APP THEN
    VSISETBIT( AL_AUX, 18, TRUE);
    ELSE
    VSISETBIT( AL_AUX, 18, FALSE);

    END_IF;


    Maybe an R_TRIG will increase performance without writing INVALID bit every cycle. I used task's property ( Execution Mode - Periodical execution) and I setted every 5 cycle task execution.
    Steven Costantini

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